Network-on-Chip (NoC) is a model for communications within systems implemented on a single chip (e.g., a silicon chip). In a NoC system, multiple devices such as processor cores, memories, IO devices, and specialized logic blocks exchange data (e.g., data packets) using a network. A switched NoC is constructed from multiple point-to-point data links interconnected by switches, such that the data packets can be relayed from any source device to any destination device over several data links, by way of specific routing decisions at the switches.
In a switched NoC system, a high level of parallelism is achieved because all links and switches in the switched NoC may operate simultaneously on different data packets. Accordingly, as the complexity of integrated circuits continues to grow, a switched NoC provides enhanced performance (e.g., throughput) and scalability. However, algorithms must be designed in such a way to offer large parallelism and thus utilize the potential of the switched NoC architecture.